1. Technical Field
The present invention relates to a signal generating apparatus and a test apparatus.
2. Related Art
A conventional charge redistribution DA converter is known. The charge redistribution DA converter is provided with an internal capacitor array in which the capacitors are connected in a ladder formation.
The charge redistribution DA converter charges the capacitor array with an amount of charge corresponding to a reference voltage during a first half of the period of the data rate, and this is known as the “refresh mode.” During the second half of the each period of the data rate, the charge redistribution DA converter switches the connection of the capacitor array according to the input data, and this is known as the “output mode.” As a result, the charge redistribution DA converter can generate a voltage corresponding to the input data. This charge redistribution DA converter consumes less power than other types of DA converters.
Such a charge redistribution DA converter, however, generates noise such as refresh noise, charge injection, and clock feedthrough caused by switch driving when switching between the refresh mode and the output mode. Accordingly, the charge redistribution DA converter has a less accurate output voltage due to the noise generated when switching between modes.
When an IC or the like is imbedded in a charge redistribution DA converter, it is desirable that both the overall capacitance and area of the capacitor array be small. However, when the overall capacitance of the capacitor array is small, thermal noise, known as KT/C noise, increases. Accordingly, in the charge redistribution DA converter there is a limit on how small the capacitor array can be and how low the overall capacitance of the capacitor array can be.
Furthermore, the charge redistribution DA converter can be provided with a low-capacitance capacitor realized by a gate capacitance of a transistor. However, since there is a non-linear voltage dependency on the gate capacitance of the transistor, it is difficult for the charge redistribution DA converter to achieve high accuracy.    Patent Document 1: Japanese Patent Application Publication No. 1993-252032    Patent Document 2: Japanese Patent No. 3166603    Patent Document 3: Japanese Patent Application Publication No. 1987-082821    Patent Document 4: Japanese Patent Application Publication No. 1989-041011    Patent Document 5: U.S. Pat. No. 6,271,784    Patent Document 6: U.S. Pat. No. 6,781,532    Patent Document 7: Japanese Patent Application Publication No. 1987-125714